There is no limit to how much ram you can add to modern computers.

The maximum random access memory (RAM) installed in any computer system is limited by hardware, software and economic factors. The hardware may have a limited number of address bus bits, limited by the processor package or design of the system. Some of the address space may be shared between RAM, peripherals, and read-only memory. In the case of a microcontroller with no external RAM, the size of the RAM array is limited by the size of the integrated circuit die. In a packaged system, only enough RAM may be provided for the system's required functions, with no provision for addition of memory after manufacture.

Software limitations to usable physical RAM may be present. An operating system may only be designed to allocate a certain amount of memory, with upper address bits reserved to indicate designations such as I/O or supervisor mode or other security information. Or the operating system may rely on internal data structures with fixed limits for addressable memory.

For mass-market personal computers, there may be no financial advantage to a manufacturer in providing more memory sockets, address lines, or other hardware than necessary to run mass-market software. When memory devices were relatively expensive compared with the processor, often the RAM delivered with the system was much less than the address capacity of the hardware, because of cost.

Sometimes RAM limits can be overcome using special techniques. Bank switching allows blocks of RAM memory to be switched into the processor's address space when required, under program control. Operating systems routinely manage running programs using virtual memory, where individual program operate as if they have access to a large memory space that is being simulated by swapping memory areas with disk storage.

For performance reasons, all the parallel address lines of an address bus must be valid at the same time, otherwise access to memory would be delayed and performance would be seriously reduced. Integrated circuit packages may have a limit on the number of pins available to provide the memory bus. Different versions of a CPU architecture, in different-sized IC packages, can be designed, trading off reduced package size for reduced pin count and address space. A trade-off might be made between address pins and other functions, restricting the memory physically available to an architecture even if it inherently has a higher capacity. On the other hand, segmented or bank switching designs provide more memory address space than is available in an internal memory address register.

As integrated circuit memory became less costly, it was feasible to design systems with larger and larger physical memory spaces.

Fewer than 16 address pins

Microcontroller devices with integrated I/O and memory on-chip sometimes had no, or a small, address bus available for external devices. For example, a microcontroller family available with a 2 kilobyte address space might have a variant that brought out an 11 line address bus for an external ROM; this could be done by reassigning I/O pins as address bus pins. Some general-purpose processors with integrated ROM split a 16-bit address space between internal ROM and an external 15-bit memory bus.

Some very early computers also had CPUs with fewer than 16 address pins: The MOS Technology 6507 (a reduced pin count version of the 6502) was used in the Atari 2600 and was limited to a 13-line address bus.

16 address bits, 16 address pins

Most 8-bit general-purpose microprocessors have 16-bit address spaces and generate 16 address lines. Examples include the Intel 8080, Intel 8085, Zilog Z80, Motorola 6800, Microchip PIC18, and many others. These processors have 8-bit CPUs with 8-bit data and 16-bit addressing. The memory on these CPUs is addressable at the byte level. This leads to a memory addressable limit of 216 × 1 byte = 65,536 bytes or 64 kilobytes.

16 address bits, 20 address pins: 8086, 8088, 80186 & 80188

The Intel 8086 and derivatives, such as the 8088, 80186 and 80188 form the basis of the popular x86 platform and are the first level of the IA16 architecture. These were 16-bit CPUs with 20-bit addressing. The memory on these CPUs were addressable at the byte level. These processors could address 220 bytes (1 megabyte).

16 bit addresses, 24 address pins: 80286

The Intel 80286 CPU used a 24-bit addressing scheme. Each memory location was byte-addressable. This results in a total addressable space of 224 × 1 byte = 16,777,216 bytes or 16 megabytes. The 286 and later could also function in real mode, which imposed the addressing limits of the 8086 processor. The 286 had support for virtual memory.

32 bit addresses, 24 address pins

The Intel 80386SX was an economical version of the 386DX. It had a 24-bit addressing scheme, in contrast to 32-bit in the 386DX. Like the 286, the 386SX can address only up to 16 megabytes of memory.

The Motorola 68000 had a 24-bit address space, allowing it to access up to 16 megabytes of memory.

32 bit addresses, 32 address pins

The 386DX had 32-bit addressing, allowing it to address up to 4 gigabytes (4096 megabytes) of memory.

The Motorola 68020, released in 1984, had a 32-bit address space, giving it a maximum addressable memory limit of 4 GB. All following chips in the Motorola 68000 series inherited this limit.

32 bit addresses, 36 address pins: Pentium Pro (aka P6)

The Pentium Pro and all Pentium 4s have 36-bit addressing, which resulted in total addressable space of 64 gigabytes, but it requires that the operating system support Physical Address Extension.

64 bit computing

Modern 64-bit processors such as designs from ARM, Intel or AMD are typically limited to supporting fewer than 64 bits for RAM addresses. They commonly implement from 40 to 52 physical address bits[1][2][3][4] (supporting from 1 TB to 4 PB of RAM). Like previous architectures described here, some of these are designed to support higher limits of RAM addressing as technology improves. In both Intel64 and AMD64, the 52-bit physical address limit is defined in the architecture specifications (4 PB).

The first major operating system for microcomputers was CP/M. This operating system was compatible with Altair 8800-like microcomputers, made by Gary Kildall in conjunction with the programming language PL/M, and was licensed to computer manufacturers by Kildall's company Digital Research after it was rejected by Intel. The Intel 8080 used by these computers was an 8-bit processor, with 16-bit address space, which allowed it access up to 64 KB of memory; .COM executables used with CP/M have a maximum size of 64 KB due to this, as do those used by DOS operating systems for 16-bit microprocessors.

IBM PC and 8088 addressing limit

In the original IBM PC, the basic RAM limit is 640 KB. This is to allow for hardware addressing space in the upper 384 KB (upper memory area (UMA)) of the total addressable memory space of 1024 KB (1 MB). Ways to overcome the 640k barrier, as it came to be known, involved using special addressing modes available in the 286 and later x86 processors. The 1 MB total address space was a result of the 20-bit address space limit imposed on the 8088 CPU.

Using the color video buffer space, some third-party utilities could add memory at the top of the 640k conventional memory area, to extend memory up to the base address used by hardware adapters. This could ultimately backfill RAM up to the MDA base address.

Hardware extensions allowed access to more memory than the 8086 CPU could address through paging memory. This memory was known as expanded memory. An industry de facto standard was developed by the LIM consortium, composed of Lotus, Intel and Microsoft. This standard was the Expanded Memory Specification (EMS). Pages of memory from expanded memory hardware were accessible through an addressing window placed into a free area in the UMA space, and by exchanging it for other pages when needed to access other memory. EMS supported 16 MB of space.

Using a quirk in the 286 CPU architecture, the high memory area (HMA) was accessible, as the first 64 KB above the 1 MB limit of 20-bit addressing in the x86 architecture.

Using the 24-bit memory addressing capabilities of the 286 CPU architecture, a total address space of 16 MB was accessible. Memory above the 1 MB limit was called extended memory. However the area between 640 KB and 1 MB was reserved for hardware addressing in IBM PC compatibles. DOS and other real mode programs, limited to 20-bit addresses, could only access this space through EMS emulation on the extended memory, or an EMS analog for extended memory. Microsoft developed a standard known as the Extended Memory Specification (XMS). Accessing the memory above the HMA required usage of the protected mode of the 286 CPU.

With the development of the i386 CPU architecture, the address space was moved to 32-bit addressing, and a limit of 4 GB. With this CPU, access to 16 MB memory areas was available to DOS programs that used DOS extenders, such as DOS/4GW, MiniGW/16, MiniGW, and others. Initially a de facto industry memory standard for interaction known as VCPI was developed. Later, a Microsoft standard supplanted this, known as the DPMI. These standards allowed direct access to the 16 MB space, instead of the paging scheme used by EMS and XMS.

16-bit OS/2 RAM limit

16-bit OS/2 was limited to 15 MB, due to reserve space designed into the operating system. It reserved the top 1 MB of the 16 MB 24-bit address space for non-memory (from 16 MB to 15 MB).

32-bit x86 RAM limit

In non-PAE modes of 32-bit x86 processors, the usable RAM may be limited to less than 4 GB. Limits on memory and address space vary by platform and operating system. Limits on physical memory for 32-bit platforms also depend on the presence and use of Physical Address Extension (PAE), which allows 32-bit systems to use more than 4 GB of physical memory.

PAE and 64-bit systems may be able to address up to the full address space of the x86 processor.

  • DOS memory management
  • Motherboard

  1. ^ "AMD64 Programmer's Manual Volume 2: System Programming" (PDF). Advanced Micro Devices. December 2016. p. 120.
  2. ^ "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1" (PDF). Intel. September 2016. p. 4-2.
  3. ^ "ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile". pp. D4-1723, D4-1724, D4-1731.
  4. ^ http://infocenter.arm.com/help/topic/com.arm.doc.den0001c/DEN0001C_principles_of_arm_memory_maps.pdf[bare URL PDF]

  • MSDN Article: Memory Limits for Windows Releases
  • The system memory that is reported in the System Information dialog box in Windows Vista is less than you expect if 4 GB of RAM is installed  – explains the issue
  • Windows Vista SP1 includes reporting of Installed System Memory (RAM) – details about the RAM limit

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In computer architecture, 8-bit integers or other data units are those that are 8 bits wide (1 octet). Also, 8-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers or data buses of that size. Memory addresses (and thus address buses) for 8-bit CPUs are generally larger than 8-bit, usually 16-bit. 8-bit microcomputers are microcomputers that use 8-bit microprocessors.

The term '8-bit' is also applied to the character sets that could be used on computers with 8-bit bytes, the best known being various forms of extended ASCII, including the ISO/IEC 8859 series of national character sets – especially Latin 1 for English and Western European languages.

The IBM System/360 introduced byte-addressable memory with 8-bit bytes, as opposed to bit-addressable or decimal digit-addressable or word-addressable memory, although its general-purpose registers were 32 bits wide, and addresses were contained in the lower 24 bits of those addresses. Different models of System/360 had different internal data path widths; the IBM System/360 Model 30 (1965) implemented the 32-bit System/360 architecture, but had an 8-bit native path width, and performed 32-bit arithmetic 8 bits at a time.[1]

The first widely adopted 8-bit microprocessor was the Intel 8080, being used in many hobbyist computers of the late 1970s and early 1980s, often running the CP/M operating system; it had 8-bit data words and 16-bit addresses. The Zilog Z80 (compatible with the 8080) and the Motorola 6800 were also used in similar computers. The Z80 and the MOS Technology 6502 8-bit CPUs were widely used in home computers and second- and third-generation game consoles of the 1970s and 1980s. Many 8-bit CPUs or microcontrollers are the basis of today's ubiquitous embedded systems.

An 8-bit register can store 28 different values. The range of integer values that can be stored in 8 bits depends on the integer representation used. With the two most common representations, the range is 0 through 255 (28 − 1) for representation as an (unsigned) binary number, and −128 (−1 × 27) through 127 (27 − 1) for representation as two's complement.

8-bit CPUs use an 8-bit data bus and can therefore access 8 bits of data in a single machine instruction. The address bus is typically a double octet (16 bits) wide, due to practical and economical considerations. This implies a direct address space of 64 KB (65,536 bytes) on most 8-bit processors.

Most home computers from the 8-bit era fully exploited the address space, such as the BBC Micro (Model B) with 32 KB of RAM plus 32 KB of ROM. Others like the very popular Commodore 64 had full 64 KB RAM, plus 20 KB ROM, meaning with 16-bit addressing you could not use all of the RAM by default (e.g. from the included BASIC language interpreter in ROM);[2] without exploiting bank switching, which allows for breaking the 64 KB (RAM) limit in some systems. Other computers would have as low as 1 KB (plus 4 KB ROM), such as the Spectrum ZX80 (while the later very popular Sinclair ZX Spectrum had more memory), or even only 128 bytes of RAM (plus storage from a ROM cartridge), as in an early game console Atari 2600 and thus 8-bit addressing would have been enough for the RAM, if it wouldn't have needed to cover ROM too). The Commodore 128, and other 8-bit systems, meaning still with 16-bit addressing, could use more than 64 KB, i.e. 128 KB RAM, also the BBC Master with it expandable to 512 KB of RAM.

While in general 8-bit CPUs have 16-bit addressing, in some architectures you have both, such as in the MOS Technology 6502 CPU, where the zero page is used extensively, saving one byte in the instructions accessing that page, and also having 16-bit addressing instructions that take 2 bytes for the address plus 1 for the opcode. Commonly index registers are 8-bit (while other "8-bit" CPUs, such as Motorola 6800 had 16-bit index registers), such as the 6502 CPU, and then the size of the arrays addressed using indexed addressing instructions are at most 256 bytes, without needing longer code, i.e. meaning 8-bit addressing to each individual array.

The first commercial 8-bit processor was the Intel 8008 (1972) which was originally intended for the Datapoint 2200 intelligent terminal. Most competitors to Intel started off with such character oriented 8-bit microprocessors. Modernized variants of these 8-bit machines are still one of the most common types of processor in embedded systems.

Another notable 8-bit CPU is the MOS Technology 6502. It, and variants of it, were used in a number of personal computers, such as the Apple I and Apple II, the Atari 8-bit family, the BBC Micro, and the Commodore PET and Commodore VIC-20, and in a number of video game consoles, such as the Atari 2600 and the Nintendo Entertainment System.

Early or popular 8-bit processors (incomplete)
Manufacturer Processor Year Comment
Intel 8008 1972 Datapoint 2200 compatible
Signetics 2650 1973
Intel 8080 1974 8008 source compatible
Motorola 6800 1974
Fairchild F8 1975
MOS 6502 1975 Similar to 6800, but incompatible
Microchip PIC 1975 Harvard architecture microcontroller
Electronic Arrays EA9002 1976 8-bit data, 12-bit addressing
RCA 1802 1976
Zilog Z80 1976 8080 binary compatible
Intel 8085 1977 8080 binary compatible
Zilog Z8 1978 Harvard architecture microcontroller
Motorola 6809 1978 6800 source compatible
Intel 8051 1980 Harvard architecture microcontroller
Motorola 68008 1982 32-bit registers, 20-bit or 22-bit addressing, three 16-bit ALUs, 8-bit data bus; Motorola 68000 software-compatible, 6809 hardware-compatible
MOS 6510 1982 Enhanced 6502 custom-made for use in the Commodore 64
Ricoh 2A03 1982 6502 clone minus BCD instructions for the Nintendo Entertainment System
Zilog Z180 1985 Z80 binary compatible
Motorola 68HC11 1985
Hudson HuC6280 1987 65C02 binary compatible
Atmel AVR 1996
Zilog EZ80 1999 Z80 binary compatible
Infineon XC800 2005
Freescale 68HC08
Motorola 6803
NEC 78K0[3]

8-bit processors continue to be designed today for general education about computer hardware, as well as for hobbyists' interests. One such CPU was designed and implemented using 7400-series integrated circuits on a breadboard.[4][5] Designing 8-bit CPU's and their respective assemblers is a common training exercise for engineering students, engineers, and hobbyists. FPGA's are used for this purpose.

  • Kenbak-1

  1. ^ Amdahl, G. M.; Blaauw, G. A.; Brooks, F. P. (1964). "Architecture of the IBM System/360" (PDF). IBM Journal of Research and Development. 8 (2): 87–101. doi:10.1147/rd.82.0087. Archived (PDF) from the original on 2017-08-10.
  2. ^ "Bank Switching - C64-Wiki". www.c64-wiki.com. Retrieved 2021-04-08.
  3. ^ "NEC 78K0". NEC. Archived from the original on 2008-10-28. Retrieved 2009-02-10.
  4. ^ Oberhaus, Daniel (February 9, 2019). "This Guy Designed and Built an 8-bit CPU from Scratch". Motherboard. Retrieved November 4, 2021.
  5. ^ Constantino, Paulo. Homebuilt 8-bit CPU + Computer with graphics and sound made from scratch using 74HC Logic.

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